Complementary metal oxide semiconductor (CMOS) technology continues to be widely used in the fabrication of integrated circuits. As integrated circuit density continues to increase, semiconductor devices with three-dimensional vertical fin structures have been developed to replace conventional planar devices, because devices with fin structures can provide higher performance at a smaller footprint than planar devices. However, increased density, with smaller critical dimensions, can introduce fabrication challenges. Therefore, further enhancements in fabrication techniques for fin structures continue to be pursued.